Data transmission is an important application of many integrated circuit devices. Data may be transmitted according to different transmission protocols, and may be transmitted as serial data or parallel data. Registers are often implemented in circuits to enable the transmission of data. For example, one common arrangement of registers which enables the transmission of data is a shift register, which is a series of registers which continuously advances bits of a data stream using a clock signal coupled to the individual registers of the shift register. Data may also be transmitted within a circuit between registers such as through combinatorial logic or programmable elements which be used to connect the registers.
It is sometimes desirable to increase the delay of data signals to prevent or reduce hold violations. However, it is expensive from the standpoint of available space on an integrated circuit to add delay elements to each data signal. While adding delay to a clock reduces the cost by a factor of the number of registers to which the clock fans out, such an arrangement has the negative effect of creating new hold problems in the preceding stage, thereby defeating the original goal. Adding extra delay to the data path to remove hold time problems is expensive because each data bit must have its own delay element.